Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8654634 | Dynamically reassigning virtual lane resources | Kris M. Kendall, Calvin Charles Paynton | 2014-02-18 |
| 8270295 | Reassigning virtual lane buffer allocation during initialization to maximize IO performance | Kris M. Kendall, Calvin Charles Paynton | 2012-09-18 |
| 7757017 | Adjusting direction of data flow between I/O bridges and I/O hubs based on real time traffic levels | Chad J. Larson, Ricardo Mata, Jr., Steven Vongvibool | 2010-07-13 |
| 7660925 | Balancing PCI-express bandwidth | Chad J. Larson, Ricardo Mata, Jr., Steven Vongvibool | 2010-02-09 |
| 7653773 | Dynamically balancing bus bandwidth | Chad J. Larson, Ricardo Mata, Jr., Steven Vongvibool | 2010-01-26 |
| 7146515 | System and method for selectively executing a reboot request after a reset to power on state for a particular partition in a logically partitioned system | Bradley Ryan Harrington, Chetan Mehta, Milton Devon Miller, II, David Lee Randall, David R. Willoughby | 2006-12-05 |
| 7107495 | Method, system, and product for improving isolation of input/output errors in logically partitioned data processing systems | Alongkorn Kitamorn, Ashwini Kulkarni, David R. Willoughby | 2006-09-12 |
| 7103808 | Apparatus for reporting and isolating errors below a host bridge | Alongkorn Kitamorn, Ashwini Kulkarni, Gordon D. McIntosh | 2006-09-05 |
| 6976191 | Method and apparatus for analyzing hardware errors in a logical partitioned data processing system | Alongkorn Kitamorn, Ashwini Kulkarni, Gordon D. McIntosh, Kanisha Patel | 2005-12-13 |
| 6898686 | Memory map adjustment to support the need of adapters with large memory requirements | — | 2005-05-24 |
| 6898644 | Method of programming I/O adapter settings for optimal performance | — | 2005-05-24 |
| 6834363 | Method for prioritizing bus errors | Christopher Harry Austen, Mark W. Wenning | 2004-12-21 |
| 6820161 | Mechanism for allowing PCI-PCI bridges to cache data without any coherency side effects | — | 2004-11-16 |
| 6704823 | Method and apparatus for dynamic allocation of interrupt lines through interrupt sharing | Louis Gabriel Rodriguez | 2004-03-09 |
| 6697940 | Mechanism to disable the gathering of time consuming unnecessary information at boottime | Louis Gabriel Rodriguez | 2004-02-24 |
| 6665753 | Performance enhancement implementation through buffer management/bridge settings | Pat Allen Buckland, Kiet Tran, Adalberto G. Yanes | 2003-12-16 |
| 6662318 | Timely error data acquistion | Irving G. Baysah | 2003-12-09 |
| 6662320 | Method and apparatus for inhibiting an adapter bus error signal following a reset operation | Rafael Graniello Cabezas, Robert G. Kovacs | 2003-12-09 |
| 6658599 | Method for recovering from a machine check interrupt during runtime | Stephen D. Linam, Louis Gabriel Rodriguez, Mark W. Wenning | 2003-12-02 |
| 6519555 | Apparatus and method of allowing PCI v1.0 devices to work in PCI v2.0 compliant system | Richard Allen Kelley, Danny Marvin Neal, Paul Gordon Robertson, Padmavathy Tamirisa, John Daniel Upton | 2003-02-11 |
| 6473814 | System for optimally tuning a burst length by setting a maximum burst length based on a latency timer value and adjusting the maximum burst length based on a cache line size | Michael E. Lyons, Sean McNeal | 2002-10-29 |