Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6754791 | Cache memory system and method for accessing a cache memory having a redundant array without displacing a cache line in a main array | George M. Braceras | 2004-06-22 |
| 5557768 | Functional pipelined virtual multiport cache memory with plural access during a single cycle | George M. Braceras | 1996-09-17 |