Issued Patents All Time
Showing 1–25 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12236219 | Tuning optimization to reduce compilation delays | — | 2025-02-25 |
| 11398004 | Allocating device buffer on GPGPU for an object with metadata using access boundary alignment | — | 2022-07-26 |
| 11210193 | Evaluating performance improvement of executing instructions in a first processor over execution on a second processor before compilation | — | 2021-12-28 |
| 11188454 | Reduced memory neural network training | — | 2021-11-30 |
| 11093224 | Compilation to reduce number of instructions for deep learning processor | Eri Ogawa, Hiroshi Inoue | 2021-08-17 |
| 11042530 | Data processing with nullable schema information | Takanori Ueda | 2021-06-22 |
| 11029924 | Program optimization by converting code portions to directly reference internal data representations | Hiroshi Inoue, Jan M. Wroblewski, Moriyoshi Ohara | 2021-06-08 |
| 10929161 | Runtime GPU/CPU selection | Gita Koblents, Alon S. Housfater, Akihiro Hayashi | 2021-02-23 |
| 10776090 | Reducing overhead of data conversation between Java and non-Java representations | — | 2020-09-15 |
| 10754754 | Evaluating performance improvement of executing instructions in a first processor over executing on a second processor | — | 2020-08-25 |
| 10719494 | Accelerating operations in B+-tree | — | 2020-07-21 |
| 10585647 | Program optimization by converting code portions to directly reference internal data representations | Hiroshi Inoue, Jan M. Wroblewski, Moriyoshi Ohara | 2020-03-10 |
| 10540194 | Runtime GPU/CPU selection | Gita Koblents, Alon S. Housfater, Akihiro Hayashi | 2020-01-21 |
| 10515430 | Allocating device buffer on GPGPU for an object with metadata using access boundary alignment | — | 2019-12-24 |
| 10459817 | Evaluating performance improvement of executing instructions in a first processor over execution on a second processor | — | 2019-10-29 |
| 10416975 | Compiling a parallel loop with a complex access pattern for writing an array for GPU and CPU | — | 2019-09-17 |
| 10394536 | Compiling a parallel loop with a complex access pattern for writing an array for GPU and CPU | — | 2019-08-27 |
| 10387994 | Automatically enabling a read-only cache in a language in which two arrays in two different variables may alias each other | — | 2019-08-20 |
| 10268463 | Profile-based per-device code optimization | Kiyokuni Kawachiya, Moriyoshi Ohara, Mikio Takeuchi | 2019-04-23 |
| 10163189 | Automatically enabling a read-only cache in a language in which two arrays in two different variables may alias each other | — | 2018-12-25 |
| 9891925 | Allocation method, apparatus, and program for managing architectural registers and physical registers using mapping tables | — | 2018-02-13 |
| 9824419 | Automatically enabling a read-only cache in a language in which two arrays in two different variables may alias each other | — | 2017-11-21 |
| 9696976 | Method for optimizing processing of character string during execution of a program, computer system and computer program for the same | Kiyokuni Kawachiya, Kazunori Ogata | 2017-07-04 |
| 9612810 | Profile-based per-device code optimization | Kiyokuni Kawachiya, Moriyoshi Ohara, Mikio Takeuchi | 2017-04-04 |
| 9542185 | Allocation method, apparatus, and program for managing architectural registers and physical registers using mapping tables | — | 2017-01-10 |