Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5642362 | Scan-based delay tests having enhanced test vector pattern generation | — | 1997-06-24 |
| 5442640 | Test and diagnosis of associated output logic for products having embedded arrays | Paul H. Bardell, Jr. | 1995-08-15 |
| 5394405 | Universal weight generator | — | 1995-02-28 |
| 5278842 | Delay test coverage enhancement for logic circuitry employing level sensitive scan design | Robert W. Berry, Jr. | 1994-01-11 |