Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11783200 | Artificial neural network implementation in field-programmable gate arrays | Dionysios Diamantopoulos, Christoph Hagleitner | 2023-10-10 |
| 11275713 | Bit-serial linear algebra processor | Raphael Polig, Jan Van Lunteren | 2022-03-15 |
| 10776118 | Index based memory access using single instruction multiple data unit | Raphael Polig, Jan Van Lunteren | 2020-09-15 |
| 10685082 | Sparse matrix multiplication using a single field programmable gate array module | Costas Bekas, Alessandro Curioni, Christoph Hagleitner, Raphael Polig, Peter Willem Jan Staar | 2020-06-16 |
| 10430326 | Precision data access using differential data | Christoph Angerer, Raphael Polig | 2019-10-01 |
| 10430325 | Precision data access using differential data | Christoph Angerer, Raphael Polig | 2019-10-01 |
| 10025754 | Linear FE system solver with dynamic multi-grip precision | Christoph Angerer, Konstantinos Bekas, Alessandro Curioni, Christoph Hagleitner, Yves G. Ineichen +1 more | 2018-07-17 |
| 9959202 | Memory and processor hierarchy to improve power efficiency | Jan Van Lunteren | 2018-05-01 |
| 9870315 | Memory and processor hierarchy to improve power efficiency | Jan Van Lunteren | 2018-01-16 |
| 9779061 | Iterative refinement apparatus | Christoph Angerer, Konstantinos Bekas, Alessandro Curioni, Silvio Dragone, Christoph Hagleitner +1 more | 2017-10-03 |
| 9703573 | Interposer for dynamic mapping of API calls | Raphael Polig | 2017-07-11 |
| 9558156 | Sparse matrix multiplication using a single field programmable gate array module | Costas Bekas, Alessandro Curioni, Christoph Hagleitner, Raphael Polig, Peter Willem Jan Staar | 2017-01-31 |