Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6611946 | Method and system for automatic generation of DRC rules with just in time definition of derived layers | Dana Rigg | 2003-08-26 |
| 6606735 | Method and system for using error and filter layers in each DRC rule | Dana Rigg | 2003-08-12 |
| 5369595 | Method of combining gate array and standard cell circuits on a common semiconductor chip | Elliot L. Gould, Douglas W. Kemerer, Lance A. McAllister, Ronald A. Piro, Deborah A. Wellburn | 1994-11-29 |
| 5051917 | Method of combining gate array and standard cell circuits on a common semiconductor chip | Elliot L. Gould, Douglas W. Kemerer, Lance A. McAllister, Ronald A. Piro, Deborah A. Wellburn | 1991-09-24 |
| 4786613 | Method of combining gate array and standard cell circuits on a common semiconductor chip | Elliot L. Gould, Douglas W. Kemerer, Lance A. McAllister, Ronald A. Piro, Deborah A. Wellburn | 1988-11-22 |