Issued Patents All Time
Showing 51–75 of 223 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9305636 | Resistive random-access memory cells | Daniel Krebs, Abu Sebastian | 2016-04-05 |
| 9298378 | Logic device | Robert Haas, Xiaoyu Hu, Peter Mueller | 2016-03-29 |
| 9274975 | Management of partial data segments in dual cache systems | Michael T. Benhase, Stephen L. Blinick, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu +3 more | 2016-03-01 |
| 9240550 | Resistive memory element based on oxygen-doped amorphous carbon | Laurent A. Dellmann, Chiara Marchiori, Claudia Santini, Abu Sebastian | 2016-01-19 |
| 9176884 | Promotion of partial data segments in flash cache | Michael T. Benhase, Stephen L. Blinick, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu +4 more | 2015-11-03 |
| 9176817 | Data management in solid state storage devices | Roy D. Cideciyan, Robert Haas, Xiao-Yu Hu, Ilias Iliadis | 2015-11-03 |
| 9170933 | Wear-level of cells/pages/sub-pages/blocks of a memory | Roy D. Cideciyan, Robert Haas, Xiao-Yu Hu, Ilias Iliadis, Roman A. Pletka | 2015-10-27 |
| 9170899 | Reliability scheme using hybrid SSD/HDD replication with log structured management | Robert Haas, Xiao-Yu Hu, Roman A. Pletka | 2015-10-27 |
| 9158706 | Selective space reclamation of data storage memory employing heat and relocation metrics | Michael T. Benhase, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu, Matthew J. Kalos +2 more | 2015-10-13 |
| 9152599 | Managing cache memories | Stephen L. Blinick, Lawrence Y. Chiu, Robert Haas, Yu-Cheng Hsu, Xiao-Yu Hu +3 more | 2015-10-06 |
| 9135181 | Management of cache memory in a flash cache architecture | Robert Haas, Xiao-Yu Hu | 2015-09-15 |
| 9105842 | Method for manufacturing a carbon-based memory element and memory element | Daniele Caimi, Charalampos Pozidis, Christophe P. Rossel, Abu Sebastian | 2015-08-11 |
| 9086979 | Management of partial data segments in dual cache systems | Michael T. Benhase, Stephen L. Blinick, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu +3 more | 2015-07-21 |
| 9064571 | Programming at least one multi-level phase change memory cell | Angeliki Pantazi, Nikolaos Papandreou, Haris Pozidis, Abu Sebastian | 2015-06-23 |
| 9037951 | Data management in solid state storage systems | Roy D. Cideciyan, Robert Haas, Xiao-Yu Hu, Ilias Iliadas, Thomas Mittelholzer | 2015-05-19 |
| 8996794 | Flash memory controller | Robert Haas, Xiao-Yu Hu | 2015-03-31 |
| 8977894 | Operating a data storage system | Robert Haas, Xiao-Yu Hu, Ilias Iliadis | 2015-03-10 |
| 8972662 | Dynamically adjusted threshold for population of secondary cache | Michael T. Benhase, Stephen L. Blinick, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu +2 more | 2015-03-03 |
| 8972661 | Dynamically adjusted threshold for population of secondary cache | Michael T. Benhase, Stephen L. Blinick, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu +2 more | 2015-03-03 |
| 8935479 | Adaptive cache promotions in a two level caching system | Michael T. Benhase, Stephen L. Blinick, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu +2 more | 2015-01-13 |
| 8935462 | Promotion of partial data segments in flash cache | Michael T. Benhase, Stephen L. Blinick, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu +4 more | 2015-01-13 |
| 8930798 | Data encoding in solid state storage devices | Roy D. Cideciyan, Thomas Mittelholzer | 2015-01-06 |
| 8930624 | Adaptive cache promotions in a two level caching system | Michael T. Benhase, Stephen L. Blinick, Lokesh M. Gupta, Robert Haas, Xiao-Yu Hu +2 more | 2015-01-06 |
| 8924513 | Storage system | Robert Haas, Xiaoyu Hu, Ilias Iliadis | 2014-12-30 |
| 8909831 | Logic device | Robert Haas, Xiaoyu Hu, Peter Mueller | 2014-12-09 |