Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9032411 | Logical extended map to demonstrate core activity including L2 and L3 cache hit and miss ratio | William M. Buros, Jennifer L. Vargus | 2015-05-12 |
| 7743140 | Binding processes in a non-uniform memory access system | Kevin M. Corry, Mark A. Peloquin, Steven L. Pratt, Santhosh Rao, Karl M. Rister | 2010-06-22 |