Issued Patents All Time
Showing 51–64 of 64 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6459629 | Memory with a bit line block and/or a word line block for preventing reverse engineering | William M. Clark, Jr., James P. Baukus | 2002-10-01 |
| 6396368 | CMOS-compatible MEM switches and method of making | Tsung-Yuan Hsu, Daniel Hyman, Robert Y. Loo, Paul Ouyang, James H. Schaffner +2 more | 2002-05-28 |
| 6367063 | Method and apparatus for selectively performing a plurality of logic operations and memory functions | John Harding, David A. Schwartz | 2002-04-02 |
| 6323696 | Sample and hold circuit | Ronald M. Hickling, Joel N. Schulman, David H. Chow, Hector J. De Los Santos | 2001-11-27 |
| 6294816 | Secure integrated circuit | James P. Baukus, William M. Clark, Jr., Allan R. Kramer | 2001-09-25 |
| 6117762 | Method and apparatus using silicide layer for protecting integrated circuits from reverse engineering | James P. Baukus, William M. Clark, Jr. | 2000-09-12 |
| 6064110 | Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering | James P. Baukus, William M. Clark, Jr. | 2000-05-16 |
| 5991209 | Split sense amplifier and staging buffer for wide memory architecture | — | 1999-11-23 |
| 5973375 | Camouflaged circuit structure with step implants | James P. Baukus, William M. Clark, Jr. | 1999-10-26 |
| 5928350 | Wide memory architecture vector processor using nxP bits wide memory bus for transferring P n-bit vector operands in one cycle | David B. Shu, David A. Schwartz | 1999-07-27 |
| 5930663 | Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering | James P. Baukus, William M. Clark, Jr. | 1999-07-27 |
| 5866933 | Integrated circuit security system and method with implanted interconnections | James P. Baukus, William M. Clark, Jr., Allan R. Kramer | 1999-02-02 |
| 5783846 | Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering | James P. Baukus, William M. Clark, Jr. | 1998-07-21 |
| 5568069 | High speed, low power pipelined logic circuit | — | 1996-10-22 |