Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4688193 | Bit processing utilizing a row and column ladder sequence | Hiromasa Yamaoka, Tadashi Okamoto, Kouichi Kimura | 1987-08-18 |
| 4494113 | Method and apparatus for self-control in distributed priority collision | Hiromasa Yamaoka, Kazuhisa Matunaga | 1985-01-15 |