Issued Patents All Time
Showing 26–50 of 85 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6107836 | Semiconductor integrated circuit device having power reduction mechanism | Takayuki Kawahara, Masashi Horiguchi, Ryoichi Kurihara, Kiyoo Itoh, Masakazu Aoki +2 more | 2000-08-22 |
| 6049500 | Semiconductor memory device and defect remedying method thereof | Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki +17 more | 2000-04-11 |
| 5880604 | Semiconductor integrated circuit device having power reduction mechanism | Takayuki Kawahara, Masashi Horiguchi, Ryoichi Kurihara, Kiyoo Itoh, Masakazu Aoki +2 more | 1999-03-09 |
| 5854508 | Semiconductor memory device having zigzag bonding pad arrangement | Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki +17 more | 1998-12-29 |
| 5822267 | Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions | Takao Watanabe, Goro Kitsukawa, Yoshiki Kawajiri, Takayuki Kawahara, Kiyoo Itoh | 1998-10-13 |
| 5805513 | Semiconductor memory device with improved substrate arrangement to permit forming a plurality of different types of random access memory, and a testing method therefor | Yasushi Takahashi, Hidetoshi Iwai, Satoshi Oguchi, Hisashi Nakamura, Hiroyuki Uchiyama +10 more | 1998-09-08 |
| 5712859 | Semiconductor integrated circuit | Kiyoo Itoh, Hitoshi Tanaka | 1998-01-27 |
| 5644548 | Dynamic random access memory having bipolar and C-MOS transistor | Goro Kitsukawa, Takao Watanabe, Noriyuki Honma, Kunihiko Yamaguchi, Kiyoo Ito +2 more | 1997-07-01 |
| 5614847 | Semiconductor integrated circuit device having power reduction mechanism | Takayuki Kawahara, Masashi Horiguchi, Ryoichi Kurihara, Kiyoo Itoh, Masakazu Aoki +2 more | 1997-03-25 |
| 5602771 | Semiconductor memory device and defect remedying method thereof | Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki +17 more | 1997-02-11 |
| 5587952 | Dynamic random access memory including read preamplifiers activated before rewrite amplifiers | Goro Kitsukawa, Takao Watanabe, Noriyuki Honma, Kunihiko Yamaguchi, Kiyoo Itoh | 1996-12-24 |
| 5579256 | Semiconductor memory device and defect remedying method thereof | Kazuhiko Kajigaya, Kazuyuki Miyazawa, Manabu Tsunozaki, Kazuyoshi Oshima, Takashi Yamazaki +17 more | 1996-11-26 |
| 5566185 | Semiconductor integrated circuit | Kiyoo Itoh, Hitoshi Tanaka | 1996-10-15 |
| RE35313 | Semiconductor integrated circuit with voltage limiter having different output ranges from normal operation and performing of aging tests | Kiyoo Itoh, Hitoshi Tanaka | 1996-08-13 |
| 5539692 | Semiconductor memory and method of setting type | Kazuhiko Kajigaya, Masashi Horiguchi, Yoshinobu Nakagome, Tetsuro Matsumoto, Masaharu Kubo | 1996-07-23 |
| 5528548 | Voltage converter of semiconductor device | Masashi Horiguchi, Kiyoo Itoh, Yoshinobu Nakagome, Masakazu Aoki, Hitoshi Tanaka | 1996-06-18 |
| 5497023 | Semiconductor memory device having separately biased wells for isolation | Shinji Nakazato, Hideaki Uchida, Yoshikasu Saito, Masahiro Yamamura, Yutaka Kobayashi +7 more | 1996-03-05 |
| 5493572 | Semiconductor integrated circuit with voltage limiter having different output ranges for normal operation and performing of aging tests | Kiyoo Itoh, Hitoshi Tanaka | 1996-02-20 |
| 5426613 | Semiconductor memory device with improved substrate arrangement to permit forming a plurality of different types of random access memory, and a testing method therefor | Yasushi Takahashi, Hidetoshi Iwai, Satoshi Oguchi, Hisashi Nakamura, Hiroyuki Uchiyama +10 more | 1995-06-20 |
| 5402375 | Voltage converter arrangement for a semiconductor memory | Masashi Horiguchi, Kiyoo Itoh, Yoshinobu Nakagome, Masakazu Aoki, Hitoshi Tanaka | 1995-03-28 |
| 5396116 | Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions | Takao Watanabe, Goro Kitsukawa, Yoshiki Kawajiri, Takayuki Kawahara, Kiyoo Itoh | 1995-03-07 |
| 5386135 | Semiconductor CMOS memory device with separately biased wells | Shinji Nakazato, Hideaki Uchida, Yoshikazu Saito, Masahiro Yamamura, Yutaka Kobayashi +7 more | 1995-01-31 |
| 5377156 | Semiconductor device incorporating main and stand-by boosted internal power supply for compensating for deviation on operating condition and fabrication process conditions | Takao Watanabe, Goro Kitsukawa, Yoshiki Kawajiri, Takayuki Kawahara, Kiyoo Itoh | 1994-12-27 |
| 5324982 | Semiconductor memory device having bipolar transistor and structure to avoid soft error | Shinji Nakazato, Hideaki Uchida, Yoshikazu Saito, Masahiro Yamamura, Yutaka Kobayashi +7 more | 1994-06-28 |
| 5272393 | Voltage converter of semiconductor device | Masashi Horiguchi, Kiyoo Itoh, Yoshinobu Nakagome, Masakazu Aoki, Hitoshi Tanaka | 1993-12-21 |