Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12353729 | Triple activate command row address latching | Kwang-Ho Cho, Kevin J. Ryan | 2025-07-08 |
| 12314580 | Row address latching for multiple activate command protocol | Kwang-Ho Cho | 2025-05-27 |
| 11972123 | Row address latching for multiple activate command protocol | Kwang-Ho Cho | 2024-04-30 |
| 5801554 | Semiconductor Integrated circuit device for handling low amplitude signals | Atsuko Momma, Kanji Oishi | 1998-09-01 |
| 5598372 | Semiconductor memory | Kanji Oishi, Masahiro Katayama, Kazufumi Watanabe | 1997-01-28 |
| 5497353 | Semiconductor memory device | Katsuyuki Sato, Sadayuki Ohkuma, Masahiro Ogata, Masahiro Yoshida | 1996-03-05 |
| 5436870 | Semiconductor memory device | Katsuyuki Sato, Sadayuki Ohkuma, Masahiro Ogata, Masahiro Yoshida | 1995-07-25 |
| 5323033 | Single chip IC device having gate array or memory with gate array and provided with redundancy capability | Hiroshi Kawamoto | 1994-06-21 |
| 5323354 | Semiconductor memory device including arrangements to facilitate battery backup | Katsuyuki Sato | 1994-06-21 |
| 5313423 | Semiconductor memory device | Katsuyuki Sato, Sadayuki Ohkuma, Masahiro Ogata, Masahiro Yoshida | 1994-05-17 |
| 5289428 | Semiconductor memory device | Katsuyuki Sato, Sadayuki Ohkuma, Masahiro Ogata, Masahiro Yoshida | 1994-02-22 |
| 5278839 | Semiconductor integrated circuit having self-check and self-repair capabilities | Hiroshi Kawamoto | 1994-01-11 |
| 5115413 | Semiconductor memory device | Katsuyuki Sato, Sadayuki Ohkuma, Masahiro Ogata, Masahiro Yoshida | 1992-05-19 |