Issued Patents All Time
Showing 76–91 of 91 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5175811 | Font data processor using addresses calculated on the basis of access parameters | Takashi Sone, Jun Sato, Shigeru Matsuo | 1992-12-29 |
| 5159320 | Graphic data processing system for extending font data into color data which is input into an image memory | Shigeru Matsuo, Jun Sato, Masahiko Kikuchi | 1992-10-27 |
| 5046023 | Graphic processing system having bus connection control capable of high-speed parallel drawing processing in a frame buffer and a system memory | Shigeru Matsuo, Jun Sato, Takashi Sone, Yoshikazu Yokota, Masahiko Kikuchi | 1991-09-03 |
| 5043713 | Graphic data processing apparatus for processing pixels having a number of bits which may be selected | Hideo Maejima, Hisashi Kajiwara | 1991-08-27 |
| 4975857 | Graphic processing apparatus utilizing improved data transfer to reduce memory size | Shinichi Kojima, Noriyuki Kurakami | 1990-12-04 |
| 4967376 | Method for displaying characters and/or figures in a computer graphics and apparatus thereof | — | 1990-10-30 |
| 4965750 | Graphic processor suitable for graphic data transfer and conversion processes | Shigeru Matsuo, Jun Sato, Takashi Sone, Masakatu Yokoyama | 1990-10-23 |
| 4947342 | Graphic processing system for displaying characters and pictures at high speed | Shigeru Matsuo, Shigeaki Yoshida, Hiroshi Takeda, Hisashi Kaziwara | 1990-08-07 |
| 4904990 | Display control device | Hiroshi Takeda, Shigeaki Yoshida | 1990-02-27 |
| 4862150 | Graphic pattern processing apparatus | Hideo Maejima, Hisashi Kajiwara | 1989-08-29 |
| 4779210 | Graphic processing apparatus | Hideo Maejima, Hisashi Kajiwara | 1988-10-18 |
| 4757310 | Display controller | Hideo Maejima, Hiroshi Takeda | 1988-07-12 |
| 4720708 | Display control device | Hiroshi Takeda, Shigeaki Yoshida | 1988-01-19 |
| 4677549 | Pipelined data processor system having increased processing speed | Hideo Maejima | 1987-06-30 |
| 4615005 | Data processing apparatus with clock signal control by microinstruction for reduced power consumption and method therefor | Hideo Maejima, Toshimasa Kihara, Yasushi Akao | 1986-09-30 |
| 4446517 | Microprogram memory with page addressing and address decode in memory | Hideo Maejima | 1984-05-01 |