Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5047825 | Semiconductor integrated circuit device having a decoder portion of complementary misfets employing multi-level conducting layer and a memory cell portion | Yutaka Shinagawa, Toru Miyamoto | 1991-09-10 |
| 4910162 | Method of manufacturing decoder circuit | Yutaka Shinagawa, Toru Miyamoto | 1990-03-20 |