Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6060352 | Method of manufacturing semiconductor device with increased focus margin | Toshihiro Sekiguchi, Hideo Aoki, Yoshitaka Tadaki, Keizo Kawakita, Jun Murata +6 more | 2000-05-09 |
| 6023084 | Semiconductor integrated circuit device including a memory device having memory cells with increased information storage capacitance and method of manufacturing same | Yoshitaka Tadaki, Jun Murata, Toshihiro Sekiguchi, Hideo Aoki, Keizo Kawakita +6 more | 2000-02-08 |
| 5933724 | Method of manufacturing a semiconductor integrated circuit device using a photomask in which transmitted light beam intensities are controlled | Toshihiro Sekiguchi, Yoshitaka Tadaki, Keizo Kawakita, Jun Murata, Katsuo Yuhara +7 more | 1999-08-03 |
| 5933726 | Method of forming a semiconductor device have a screen stacked cell capacitor | Michio Nishimura, Masayuki Yasuda, Takashi Hayakawa, Michio Tanaka, Yuji Ezaki +14 more | 1999-08-03 |
| 5831300 | Semiconductor integrated circuit device including a memory device having memory cells with increased information storage capacitance and method of manufacturing same | Yoshitaka Tadaki, Jun Murata, Toshihiro Sekiguchi, Hideo Aoki, Keizo Kawakita +6 more | 1998-11-03 |
| 5804479 | Method for forming semiconductor integrated circuit device having a capacitor | Hideo Aoki, Jun Murata, Yoshitaka Tadaki, Toshihiro Sekiguchi, Keizo Kawakita +9 more | 1998-09-08 |
| 5732009 | Semiconductor integrated circuit device including a DRAM in which a cell selection transistor has a stabilized threshold voltage | Yoshitaka Tadaki, Jun Murata, Katsuo Yuhara, Yuji Ezaki, Michio Tanaka +5 more | 1998-03-24 |
| 5578849 | Semiconductor integrated circuit device including a memory device having memory cells with increased information storage capacitance | Yoshitaka Tadaki, Jun Murata, Toshihiro Sekiguchi, Hideo Aoki, Keizo Kawakita +6 more | 1996-11-26 |