Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7028159 | Processing device with prefetch instructions having indicator bits specifying cache levels for prefetching | Kenji Matsubara, Toshihiko Kurihara | 2006-04-11 |
| 7028160 | Processing device with prefetch instructions having indicator bits specifying cache levels for prefetching | Kenji Matsubara, Toshihiko Kurihara | 2006-04-11 |
| 6598126 | Processing device which prefetches instructions having indicator bits specifying cache levels for prefetching | Kenji Matsubara, Toshihiko Kurihara | 2003-07-22 |
| 6598127 | Information processing system with prefetch instructions having indicator bits specifying a quantity of operand data for prefetching | Kenji Matsubara, Toshihiko Kurihara | 2003-07-22 |
| 6381679 | Information processing system with prefetch instructions having indicator bits specifying cache levels for prefetching | Kenji Matsubara, Toshihiko Kurihara | 2002-04-30 |
| 6131145 | Information processing unit and method for controlling a hierarchical cache utilizing indicator bits to control content of prefetching operations | Kenji Matsubara, Toshihiko Kurihara | 2000-10-10 |
| 5438669 | Data processor with improved loop handling utilizing improved register allocation | Kisaburo Nakazawa, Hiroshi Nakamura, Hideo Wada | 1995-08-01 |