RN

Rie Nishiyama

HC Hitachi Ulsi Systems Co.: 9 patents #70 of 867Top 9%
HI Hitachi: 4 patents #8,942 of 28,497Top 35%
RE Renesas Electronics: 3 patents #1,322 of 4,529Top 30%
RT Renesas Technology: 3 patents #990 of 3,337Top 30%
📍 Akishima, JP: #65 of 519 inventorsTop 15%
Overall (All Time): #515,368 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
8674745 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit Kazuo Tanaka, Hiroyuki Mizuno, Manabu Miyamoto 2014-03-18
8139332 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit Kazuo Tanaka, Hiroyuki Mizuno, Manabu Miyamoto 2012-03-20
7944656 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit Kazuo Tanaka, Hiroyuki Mizuno, Manabu Miyamoto 2011-05-17
7403361 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit Kazuo Tanaka, Hiroyuki Mizuno, Manabu Miyamoto 2008-07-22
7091767 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit Kazuo Tanaka, Hiroyuki Mizuno, Manabu Miyamoto 2006-08-15
6853217 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit Kazuo Tanaka, Hiroyuki Mizuno, Manabu Miyamoto 2005-02-08
6677780 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit Kazuo Tanaka, Hiroyuki Mizuno, Manabu Miyamoto 2004-01-13
6504400 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit Kazuo Tanaka, Hiroyuki Mizuno, Manabu Miyamoto 2003-01-07
6392439 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit Kazuo Tanaka, Hiroyuki Mizuno, Manabu Miyamoto 2002-05-21
6249145 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit Kazuo Tanaka, Hiroyuki Mizuno, Manabu Miyamoto 2001-06-19