Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7200827 | Chip-area reduction and congestion alleviation by timing-and-routability-driven empty-space propagation | Wen-Chung Fang | 2007-04-03 |
| 6792585 | Method and apparatus of relative datapath cell placement with structure bonding | Scot A. Woodward, Yung-Hung Wang, Duan-Ping Chen, Wei-Kong Chia | 2004-09-14 |
| 5930499 | Method for mixed placement of structured and non-structured circuit elements | Yulin Chen, Wei-Kong Chia, Hau-Yung Chen, Rwei-Cheng Lo | 1999-07-27 |
| 5384720 | Logic circuit simulator and logic simulation method having reduced number of simulation events | Wei-Kong Chia, Dong-Ru Shieh | 1995-01-24 |