Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9620204 | Interconnection architecture for multilayer circuits | — | 2017-04-11 |
| 8773167 | Implementing logic circuits with memristors | R. Stanley Williams | 2014-07-08 |
| 8773882 | Mixed-scale electronic interfaces | Zhiyong Li | 2014-07-08 |
| 8253443 | Interconnection architectures for multilayer crossbar circuits | — | 2012-08-28 |
| 7982504 | Interconnection architecture for multilayer circuits | — | 2011-07-19 |
| 7958071 | Computational nodes and computational-node networks that include dynamical-nanodevice connections | Gregory S. Snider | 2011-06-07 |
| 7872502 | Defect-and-failure-tolerant demultiplexer using series replication and error-control encoding | Philip J. Kuekes, R. Stanley Williams | 2011-01-18 |
| 7778061 | Crossbar-memory systems and methods for writing to and reading from crossbar memory junctions of crossbar-memory systems | Philip J. Kuekes | 2010-08-17 |
| 7763978 | Three-dimensional crossbar array systems and methods for writing information to and reading information stored in three-dimensional crossbar array junctions | Wei Wu, R. Stanley Williams, Gregory S. Snider, Zhaoning Yu, Shih-Yuan Wang +1 more | 2010-07-27 |
| 7741204 | Mixed-scale electronic interfaces | Zhiyong Li | 2010-06-22 |
| 7612882 | Optical gratings, lithography tools including such optical gratings and methods for using same for alignment | Wei Wu, Shih-Yuan Wang, Jun Gao, Zhaoning Yu | 2009-11-03 |
| 7319416 | Tunneling-resistor-junction-based microscale/nanoscale demultiplexer arrays | Gregory S. Snider, Duncan Stewart, Joseph Straznicky | 2008-01-15 |