RR

Ron M. Roth

HP HP: 24 patents #877 of 16,619Top 6%
HE Hewlett Packard Enterprise: 11 patents #225 of 4,473Top 6%
Koniniklijke Philips N.V.: 2 patents #2,768 of 7,486Top 40%
IH Interdisciplinary Center Herzliya: 1 patents #6 of 9Top 70%
AT Agilent Technologies: 1 patents #1,723 of 3,411Top 55%
TL Technion Research & Development Foundation Limited: 1 patents #488 of 1,205Top 45%
IBM: 1 patents #44,794 of 70,183Top 65%
BN Ben-Gurion University Of The Negev: 1 patents #8 of 48Top 20%
📍 Palo Alto, CA: #484 of 9,675 inventorsTop 6%
🗺 California: #10,935 of 386,348 inventorsTop 3%
Overall (All Time): #74,949 of 4,157,543Top 2%
41
Patents All Time

Issued Patents All Time

Showing 26–41 of 41 patents

Patent #TitleCo-InventorsDate
8407560 Systems and methods for encoding information for storage in an electronic memory and for decoding encoded information retrieved from an electronic memory Erik Ordentlich, Pascal Olivier Vontobel 2013-03-26
7899091 Defect-tolerant demultiplexers based on threshold logic Joseph Warren Robinett, Philip J. Kuekes, R. Stanley Williams 2011-03-01
7489583 Constant-weight-code-based addressing of nanoscale and mixed microscale/nanoscale arrays Philip J. Kuekes, J. Warren Roblnett, Gadlel Seroussl, Gregory S. Smider, R. Stanley Williams 2009-02-10
7206987 Error detection and correction in a layered, 3-dimensional storage architecture Gadiel Seroussi 2007-04-17
6535455 Fault-tolerant neighborhood-disjoint address logic for solid state memory Josh Hogan 2003-03-18
6532565 Burst error and additional random bit error correction in a memory Gadiel Seroussi, Ian F. Blake 2003-03-11
6466512 Method of generating address configurations for solid state memory Josh Hogan 2002-10-15
6466959 Apparatus and method for efficient arithmetic in finite fields through alternative representation Ian F. Blake, Gadiel Seroussi 2002-10-15
6459648 Fault-tolerant address logic for solid state memory Josh Hogan 2002-10-01
6199087 Apparatus and method for efficient arithmetic in finite fields through alternative representation Ian F. Blake, Gadiel Seroussi 2001-03-06
6188335 Method and apparatus having cascaded decoding for multiple runlength-limited channel codes Josh Hogan, Gitit Ruckenstein 2001-02-13
6175317 Two-dimensional DC-free encoder and decoder Erik Ordentlich 2001-01-16
6074831 Partitioning of polymorphic DNAs Zohar Yakhini, Peter Webb 2000-06-13
6002718 Method and apparatus for generating runlength-limited coding with DC control 1999-12-14
5719884 Error correction method and apparatus based on two-dimensional code array with reduced redundancy Gadiel Seroussi 1998-02-17
5351246 Method and means for coding and rebuilding that data contents of unavailable DASDs or rebuilding the contents of DASDs in error in the presence of reduced number of unavailable DASDs in a DASD array Miguel M. Blaum 1994-09-27