Issued Patents All Time
Showing 26–50 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7418367 | System and method for testing a cell | Andrew Harvey Barr, Dale Shidla | 2008-08-26 |
| 7415700 | Runtime quality verification of execution units | Andrew Harvey Barr, Dale Shidla | 2008-08-19 |
| 7409576 | High-availability cluster with proactive maintenance | Andrew Harvey Barr | 2008-08-05 |
| 7350109 | System and method for testing a memory using DMA | Andrew Harvey Barr, Dale Shidla | 2008-03-25 |
| 7346755 | Memory quality assurance | Andy Harvey Barr, Dale Shidla | 2008-03-18 |
| 7328380 | Memory scrubbing logic | Andy Harvey Barr, Dale Shidla | 2008-02-05 |
| 7313749 | System and method for applying error correction code (ECC) erasure mode and clearing recorded information from a page deallocation table | John Nerl, Gary Gostin, Andrew C. Walton, David Soper | 2007-12-25 |
| 7308638 | System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem | John Nerl, Gary Gostin, Andrew C. Walton, David Soper | 2007-12-11 |
| 7272733 | Method of providing dynamic power redundancy based on a difference of current power units and currently needed power units | Andrew Harvey Barr | 2007-09-18 |
| 7251773 | Beacon to visually locate memory module | Thane M. Larson | 2007-07-31 |
| 7228460 | Multi-state status reporting for high-availability cluster nodes | Andrew Harvey Barr | 2007-06-05 |
| 7228462 | Cluster node status detection and communication | Andrew Harvey Barr | 2007-06-05 |
| 7222246 | Method for determining number of dynamically temperature-adjusted power supply units needed to supply power according to measure operating temperature of power supply units | Andrew Harvey Barr | 2007-05-22 |
| 7213170 | Opportunistic CPU functional testing with hardware compare | Dale Shidla, Andrew Harvey Barr | 2007-05-01 |
| 7206969 | Opportunistic pattern-based CPU functional testing | Dale Shidla, Andrew Harvey Barr | 2007-04-17 |
| 7206966 | Fault-tolerant multi-core microprocessing | Andrew Harvey Barr, Dale Shidla | 2007-04-17 |
| 7146530 | Targeted fault tolerance by special CPU instructions | Andrew Harvey Barr, Dale Shidla | 2006-12-05 |
| 7143236 | Persistent volatile memory fault tracking using entries in the non-volatile memory of a fault storage unit | Thane M. Larson | 2006-11-28 |
| 7072788 | System and method for testing an interconnect in a computer system | Andrew Harvey Barr, Dale Shidla | 2006-07-04 |
| 6995581 | Apparatus and method for detecting and rejecting high impedance failures in chip interconnects | Andrew Harvey Barr, Dale Shidla | 2006-02-07 |
| 6985826 | System and method for testing a component in a computer system using voltage margining | Andrew Harvey Barr, Dale Shidla | 2006-01-10 |
| 6940288 | Apparatus and method for monitoring and predicting failures in system interconnect | Andrew Harvey Barr, Dale Shidla | 2005-09-06 |
| 6933853 | Apparatus and method for detecting and communicating interconnect failures | Andrew Harvey Barr, Dale Shidla | 2005-08-23 |
| 6928589 | Node management in high-availability cluster | Andrew Harvey Barr | 2005-08-09 |
| 6919813 | Built-in circuitry and method to test connector loading | Andrew Harvey Barr, Dale Shidla | 2005-07-19 |