Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8924653 | Transactional cache memory system | Blaine D. Gaither | 2014-12-30 |
| 8473673 | Memory controller based (DE)compression | Blaine D. Gaither, Russ W. Herrell | 2013-06-25 |
| 8051250 | Systems and methods for pushing data | Blaine D. Gaither, Darel N. Emmot, Benjamin D. Osecky | 2011-11-01 |
| 7739478 | Multiple address sequence cache pre-fetching | Blaine D. Gaither | 2010-06-15 |
| 7600079 | Performing a memory write of a data unit without changing ownership of the data unit | Blaine D. Gaither, Patrick Knebel | 2009-10-06 |
| 7376799 | System for reducing the latency of exclusive read requests in a symmetric multi-processing system | Blaine D. Gaither | 2008-05-20 |
| 6879270 | Data compression in multiprocessor computers | — | 2005-04-12 |
| 6526504 | System and method for sizing computer systems with variable ramp-up periods by calculating a throughput for target configuration based on data obtained from a computer subsystem | Russell O. Craig, Dennis Clark | 2003-02-25 |
| 6232953 | Method and apparatus for removing artifacts from scanned halftone images | James J. Graham, Michael J. Yancey | 2001-05-15 |
| 5821915 | Method and apparatus for removing artifacts from scanned halftone images | James J. Graham, Michael J. Yancey | 1998-10-13 |