Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4893509 | Method and product for fabricating a resonant-bridge microaccelerometer | James C. Erskine | 1990-01-16 |
| 4811063 | JMOS transistor utilizing polysilicon sinks | Stephen J. Valeri, Kailash C. Jain | 1989-03-07 |
| 4800170 | Process for forming in a silicon oxide layer a portion with vertical side walls | Kailash C. Jain | 1989-01-24 |
| 4786952 | High voltage depletion mode MOS power field effect transistor | Kailash C. Jain | 1988-11-22 |
| 4769685 | Recessed-gate junction-MOS field effect transistor | James C. Erskine | 1988-09-06 |
| 4746960 | Vertical depletion-mode j-MOSFET | Stephen J. Valeri, Kailash C. Jain | 1988-05-24 |
| 4652334 | Method for patterning silicon dioxide with high resolution in three dimensions | Kailash C. Jain | 1987-03-24 |
| 4618505 | Method of making adherent score-resistant coating for metals | James C. Erskine, John C. Bierlein | 1986-10-21 |
| 4611220 | Junction-MOS power field effect transistor | — | 1986-09-09 |
| 4554208 | Metal bearing surface having an adherent score-resistant coating | James C. Erskine, John C. Bierlein | 1985-11-19 |
| 4410611 | Hard and adherent layers from organic resin coatings | — | 1983-10-18 |
| 4321317 | High resolution lithography system for microelectronic fabrication | — | 1982-03-23 |