Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9990458 | Generic design rule checking (DRC) test case extraction | Davinder Aggarwal, Vaibhav A. Ruparelia, Neha Singh | 2018-06-05 |
| 9859177 | Test method and structure for integrated circuits before complete metalization | Ramesh Raghavan, Balaji Jayaraman, Thejas Kempanna, Rajesh Reddy Tummuru, Toshiaki Kirihata | 2018-01-02 |
| 9786333 | Dual-bit 3-T high density MTPROM array | Ramesh Raghavan, Balaji Jayaraman, Thejas Kempanna, Rajesh Reddy Tummuru, Toshiaki Kirihata | 2017-10-10 |
| 9721059 | Post-layout thermal-aware integrated circuit performance modeling | Tamilmani Ethirajan, Ashwin Srinivas, Ananth Sundaram | 2017-08-01 |
| 9721673 | Distributed current source/sink using inactive memory elements | Ramesh Raghavan, Balaji Jayaraman, Rajesh Reddy Tummuru, Thejas Kempanna | 2017-08-01 |
| 9659604 | Dual-bit 3-T high density MTPROM array | Ramesh Raghavan, Balaji Jayaraman, Thejas Kempanna, Rajesh Reddy Tummuru, Toshiaki Kirihata | 2017-05-23 |
| 9589658 | Disturb free bitcell and array | Navin Agarwal, Aditya S. Auyisetty, Balaji Jayaraman, Thejas Kempanna, Toshiaki Kirihata +4 more | 2017-03-07 |
| 9292652 | Generic design rule checking (DRC) test case extraction | Davinder Aggarwal, Vaibhav A. Ruparelia, Neha Singh | 2016-03-22 |
| 8875064 | Automated design rule checking (DRC) test case generation | Davinder Aggarwal, Vibhor Jain | 2014-10-28 |