Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5880609 | Non-blocking multiple phase clocking scheme for dynamic logic | Edgardo F. Klass, David Wilson Poole | 1999-03-09 |
| 5063343 | Current pump structure | Mark E. Fitzpatrick | 1991-11-05 |
| 4978904 | Circuit for generating reference voltage and reference current | Mark E. Fitzpatrick | 1990-12-18 |
| 4970406 | Resettable latch circuit | Mark E. Fitzpatrick, Yat-Sum Chan, Richard F. Pang | 1990-11-13 |
| 4958089 | High output drive FET buffer for providing high initial current to a subsequent stage | Mark F. Fitzpatrick | 1990-09-18 |
| 4910418 | Semiconductor fuse programmable array structure | Andrew C. Graham, Mark E. Fitzpatrick | 1990-03-20 |
| 4897836 | Programmable connection path circuit | Mark E. Fitzpatrick, Yat-Sum Chan, Richard F. Pang | 1990-01-30 |
| 4871931 | Logic circuit resistant to errors due to supply fluctuations | Mark E. Fitzpatrick, Yat-Sum Chan, Richard F. Pang | 1989-10-03 |
| 4868416 | FET constant reference voltage generator | Mark E. Fitzpatrick | 1989-09-19 |
| 4868427 | ECL to TTL circuit | Mark E. Fitzpatrick, Yat-Sum Chan | 1989-09-19 |
| 4853628 | Apparatus for measuring circuit parameters of a packaged semiconductor device | Mark E. Fitzpatrick | 1989-08-01 |
| 4670708 | Short detector for fusible link array using a pair of parallel connected reference fusible links | Bob Bosnyak, Albert Chan, Mark E. Fitzpatrick, Cyrus Y. Tsui, Andrew K. Chan | 1987-06-02 |
| 4654830 | Method and structure for disabling and replacing defective memory in a PROM | H. T. Chua, Cyrus Y. Tsui, Albert Chan | 1987-03-31 |
| 4634898 | TTL buffer circuit incorporating active pull-down transistor | Albert Chan, Cyrus Y. Tsui, Mark E. Fitzpatrick | 1987-01-06 |