SS

Shinichi Sutou

FL Fujitsu Semiconductor Limited: 5 patents #123 of 1,301Top 10%
SH Showa: 3 patents #75 of 337Top 25%
Cypress Semiconductor: 2 patents #733 of 1,852Top 40%
Fujitsu Limited: 2 patents #10,930 of 24,456Top 45%
Honda Motor Co.: 1 patents #12,035 of 21,052Top 60%
KY Kyb: 1 patents #177 of 347Top 55%
Overall (All Time): #378,930 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDate
10203014 Cover member and shock absorber Tomoyoshi Nagamachi 2019-02-12
10190686 Cover member Tomoyoshi Nagamachi, Akira Takada 2019-01-29
10167919 Cylinder device and cover member Masahiro Miwa, Kazuma Ando, Yasutaka Ohta, Koji Takami 2019-01-01
9720879 Reconfigurable circuit having rows of a matrix of registers connected to corresponding ports and a semiconductor integrated circuit Ichiro Kasama, Kyoji Sato, Takashi Hanai, Kiyomitsu Katou, Takahiro Kubota +1 more 2017-08-01
9251117 Reconfigurable circuit with suspension control circuit Takashi Hanai 2016-02-02
8657270 Cover member and suspension Akira Takada 2014-02-25
8539415 Reconfigurable circuit, its design method, and design apparatus 2013-09-17
8451022 Integrated circuit and input data controlling method for reconfigurable circuit Tetsuo Kawano, Takashi Hanai 2013-05-28
8359419 System LSI having plural buses Kiyomitsu Katou 2013-01-22
8291360 Data conversion apparatus, method, and computer-readable recording medium storing program for generating circuit configuration information from circuit description Hayato Higuchi, Tsuguchika TABARU, Manabu Matsuyama, Ryuichi Ohzeki, Toshihiro Suzuki 2012-10-16
8171259 Multi-cluster dynamic reconfigurable circuit for context valid processing of data by clearing received data with added context change indicative signal Takashi Hanai 2012-05-01
7996661 Loop processing counter with automatic start time set or trigger modes in context reconfigurable PE array Takashi Hanai, Masaki Arai, Mitsuharu Wakayoshi 2011-08-09
5781560 System testing device and method using JTAG circuit for testing high-package density printed circuit boards Kayoko Kawano, Yasushi Takaki, Kazuhiro Hara 1998-07-14