Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7464355 | Timing analyzing method and apparatus for semiconductor integrated circuit | — | 2008-12-09 |
| 7444607 | Method for correcting timing error when designing semiconductor integrated circuit | Hiroaki Ando | 2008-10-28 |
| 6647522 | Semiconductor devices having multiple memories | Hideaki Nakahara, Masahiko Sudo, Yasuhiro Kawakami, Kiminori Kato, Tetsuya Hiramatsu | 2003-11-11 |
| 5446675 | Developing method and apparatus of hierarchical graphic data for use in a semiconductor integrated circuit | — | 1995-08-29 |