Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5506162 | Method of producing a semiconductor integrated circuit device using a master slice approach | Yoshio Hirose, Koichi Yamashita, Shinji Sato, Takeshi Sasaki, Ataru Kumagai | 1996-04-09 |
| 5341383 | Circuit arrangement suitable for testing cells arranged in rows and columns, semiconductor integrated circuit device having the same, and method for arranging circuit blocks on chip | Junichi Shikatani | 1994-08-23 |