Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12314724 | Arithmetic processing device and arithmetic processing method | — | 2025-05-27 |
| 12190115 | Processing call and return information due to a branch prediction error | Chunye You | 2025-01-07 |
| 11720366 | Arithmetic processing apparatus using either simple or complex instruction decoder | — | 2023-08-08 |
| 11507377 | Arithmetic processing circuit and arithmetic processing method | — | 2022-11-22 |
| 11372712 | Processing device and method of controlling processing device | Norihito Gomyo, Yasunobu Akizuki | 2022-06-28 |
| 11314505 | Arithmetic processing device | — | 2022-04-26 |
| 11249763 | Arithmetic processing unit and control method for arithmetic processing unit | Yasunobu Akizuki | 2022-02-15 |
| 11231926 | Arithmetic processing unit and control method for arithmetic processing unit | — | 2022-01-25 |
| 11210101 | Arithmetic processing device and control method implemented by arithmetic processing device | Sota Sakashita, Atushi Fusejima | 2021-12-28 |
| 11080063 | Processing device and method of controlling processing device | — | 2021-08-03 |
| 10983790 | Arithmetic processing unit and control method for arithmetic processing unit | — | 2021-04-20 |
| 10929137 | Arithmetic processing device and control method for arithmetic processing device | Hisanari Fujita, Takashi Suzuki | 2021-02-23 |
| 10824431 | Releasing rename registers for floating-point operations | Yasunobu Akizuki, Atushi Fusejima, Norihito Gomyo | 2020-11-03 |
| 10628154 | Arithmetic processing device and method of controlling arithmetic processing device | Norihito Gomyo | 2020-04-21 |
| 10430196 | Arithmetic processing device for predicting loop processing | Norihito Gomyo, Yasunobu Akizuki, Takashi Suzuki | 2019-10-01 |
| 10048969 | Dynamic branch predictor indexing a plurality of weight tables by instruction address fetch history and making a prediction based on a product sum calculation of global history register values and outputted weight table value | Takashi Suzuki | 2018-08-14 |
| 9965283 | Multi-threaded processor interrupting and saving execution states of complex instructions of a first thread to allow execution of an oldest ready instruction of a second thread | Yasunobu Akizuki, Takekazu Tabata | 2018-05-08 |