Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7505476 | Packet transfer path control apparatus and control program therefor | Hiroshi Okagawa | 2009-03-17 |
| 7450594 | Message writing apparatus, message writing method, message readout apparatus, message readout method, memory address control circuit for writing of variable-length message and memory address control circuit for readout of variable-length message | Akira Yamamori, Takeshi Sasaki, Eiji Maeda, Masao Maeda, Tatsuya Oku +3 more | 2008-11-11 |
| 6711168 | Terminating apparatus for ATM adaptation layer | Shigeatsu Samukawa | 2004-03-23 |
| 6021450 | Combining plural data lines and clock lines into set of parallel lines and set of serial lines | Hiroichi Nara, Junichi Tamura, Masao Hayashi | 2000-02-01 |
| 5715247 | Method of sending and receiving setting information and monitoring information in communication apparatus | Hiroichi Nara | 1998-02-03 |
| 5523984 | Clock distributing method and apparatus | Hiroyuki Sato, Hiroomi Tateishi, Haruo Yamashita, Junichi Tamura | 1996-06-04 |
| 5404332 | Apparatus for and a method of detecting a malfunction of a FIFO memory | Hiroyuki Sato, Hiroomi Tateishi, Junichi Tamura, Masayoshi Sekido | 1995-04-04 |