Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11836580 | Machine learning method | Satoko Iwakura, Shunichi Watanabe, Tetsuyoshi Shiota, Daisuke Fukuda, Masaru TODORIKI | 2023-12-05 |
| 11829867 | Computer-readable recording medium and learning data generation method | Satoko Iwakura, Shunichi Watanabe, Tetsuyoshi Shiota, Daisuke Fukuda | 2023-11-28 |
| 8527926 | Indicator calculation method and apparatus | — | 2013-09-03 |
| 8271921 | Automatic circuit design technique using pareto optimal solutions | Yu Liu | 2012-09-18 |
| 8181141 | Dummy rule generating apparatus | — | 2012-05-15 |
| 8108814 | Dummy metal insertion processing method and apparatus | — | 2012-01-31 |
| 8024685 | Delay analysis support apparatus, delay analysis support method and computer product | Toshiyuki Shibuya, Katsumi Homma | 2011-09-20 |
| 8024673 | Layout evaluation apparatus and method | — | 2011-09-20 |
| 7944446 | Device and method for displaying delay analysis results, and computer product | Toshiyuki Shibuya, Katsumi Homma | 2011-05-17 |
| 7934182 | Method and apparatus for supporting delay analysis, and computer product | Katsumi Homma, Toshiyuki Shibuya | 2011-04-26 |
| 7870533 | Delay analysis apparatus, delay analysis method and computer product | Katsumi Homma, Toshiyuki Shibuya | 2011-01-11 |
| 7681161 | Circuit delay analyzer, circuit delay analyzing method, and computer product | Katsumi Homma, Hidetoshi Matsuoka, Toshiyuki Shibuya | 2010-03-16 |
| 7653889 | Method and apparatus for repeat execution of delay analysis in circuit design | Toshiyuki Shibuya, Katsumi Homma, Hidetoshi Matsuoka | 2010-01-26 |
| 7516432 | Circuit delay analyzing method, circuit delay analyzing apparatus, and computer product | Katsumi Homma, Toshiyuki Shibuya, Hidetoshi Matsuoka | 2009-04-07 |
| 7320118 | Delay analysis device, delay analysis method, and computer product | Katsumi Homma, Toshiyuki Shibuya, Hidetoshi Matsuoka | 2008-01-15 |
| 6415427 | Method and apparatus for global routing, and storage medium having global routing program stored therein | Hidetoshi Matsuoka | 2002-07-02 |
| 5850350 | Apparatus for determining initial array of integrated circuit | Toshiyuki Shibuya | 1998-12-15 |