Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8701064 | Timing error removing method and design support apparatus | — | 2014-04-15 |
| 7367005 | Method and apparatus for designing a layout, and computer product | Kazuyuki Kosugi | 2008-04-29 |
| 7353482 | Routing display facilitating task of removing error | — | 2008-04-01 |
| 6295633 | Floor-planning technique applied to circuit design in which a circuit is divided automatically into sub-circuits that are equally matched with efficiently arranged physical blocks | — | 2001-09-25 |