Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6334156 | Node grouping method and data transmitting method in a network | Hidetoshi Matsuoka, Shintaro Shimogori, Koichiro Takayama | 2001-12-25 |
| 5740468 | Data transferring buffer | — | 1998-04-14 |
| 5708594 | Automatic instruction string generation method and device for verifying processor operation model and logic | Hiroaki Iwashita, Satoshi Kowatari, Tsuneo Nakata | 1998-01-13 |
| 5535387 | Uniform load distributing method for use in executing parallel processing in parallel computer | Hidetoshi Matsuoka | 1996-07-09 |
| 5475832 | Logic simulation method | Minoru Shoji | 1995-12-12 |
| 5424734 | Variable logic operation apparatus | Kioto Hirahara, Hidetoshi Matsuoka, Koichiro Takayama, Shintaro Shimogori | 1995-06-13 |
| 5245549 | Gate addressing system for logic simulation machine | Minoru Shoji | 1993-09-14 |
| 4942615 | Gate processor arrangement for simulation processor system | — | 1990-07-17 |