Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7012625 | Image quality correcting circuit | Masayuki Kobayashi | 2006-03-14 |
| 6768357 | PLL circuit which compensates for stoppage of PLL operations | Takushi Kimura | 2004-07-27 |
| 6650792 | Image processor | Toru Aida, Masayuki Kobayashi, Junichi Onodera, Hideyuki Ohmori | 2003-11-18 |
| 6522366 | Dual-loop PLL circuit and chrominance demodulation circuit | Junichi Onodera, Nobuyuki Takagi | 2003-02-18 |
| 6456337 | Moving image correcting circuit for display device | Masayuki Kobayashi, Hayato Denda | 2002-09-24 |
| 6348930 | Motion vector processing circuit | Masayuki Kobayashi, Hayato Denda | 2002-02-19 |
| 6344839 | Drive method and drive circuit of display device | Hayato Denda, Asao Kosakai, Junichi Onodera, Masayuki Kobayashi, Seiji Matsunaga | 2002-02-05 |
| 6335735 | Dynamic image correction method and dynamic image correction circuit for display device | Hayato Denda, Masayuki Kobayashi | 2002-01-01 |
| 6313709 | Phase-locked loop | Eizo Nishimura | 2001-11-06 |
| 6069610 | Drive for a display device | Hayato Denda, Asao Kosakai, Junichi Onodera, Masayuki Kobayashi, Seiji Matsunaga | 2000-05-30 |
| 6061040 | Drive circuit for display device | Junichi Onodera, Asao Kosakai, Masayuki Kobayashi, Hayato Denda, Seiji Matsunaga +1 more | 2000-05-09 |
| 5790095 | Error variance processing equipment for display device | Junichi Onodera, Asao Kosakai, Masayuki Kobayashi, Hayato Denda, Seiji Matsunaga | 1998-08-04 |
| 5760756 | Error variance circuit | Masayuki Kobayashi, Asao Kosakai, Junichi Onodera, Hayato Denda | 1998-06-02 |