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Adaptive bandwidth systems and methods |
Sai Siddharth Pothapragada |
2019-05-07 |
| 9496888 |
Asynchronous SAR ADC with binary scaled redundancy |
Sunny Sharma, Chin Yeong Koh |
2016-11-15 |
| 8907651 |
Power supply circuit for reduced wake-up time |
Morthala V Narsi Reddy, Kushal Kamal |
2014-12-09 |
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Well-biasing circuit for integrated circuit |
Manmohan Rana, Nishant Singh Thakur |
2014-11-18 |
| 8890495 |
Power supply for integrated circuit |
Garima Sharda, Nishant Singh Thakur |
2014-11-18 |
| 8780649 |
Buffer and control circuit for synchronous memory controller |
Nitin Pant, Trong D. Nguyen |
2014-07-15 |
| 8762753 |
Power management circuit using two configuration signals to control the power modes of two circuit modules using two crosslinked multiplexers and a level shifter |
Kumar Abhishek, Manmohan Rana |
2014-06-24 |
| 8760202 |
System for generating clock signal |
Niti Gupta, Sunny Gupta |
2014-06-24 |
| 8689023 |
Digital logic controller for regulating voltage of a system on chip |
Sunny Gupta, Kumar Abhishek, Garima Sharda |
2014-04-01 |
| 8487805 |
Successive approximation analog-to-digital converter |
Sunny Gupta, Kumar Abhishek, Kushal Kamal |
2013-07-16 |
| 8432201 |
Phase-locked loop (PLL) circuit |
Niti Gupta |
2013-04-30 |
