Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9853540 | Power supply circuit | — | 2017-12-26 |
| 9577551 | Motor drive apparatus | — | 2017-02-21 |
| 9385553 | Balance charging circuit for series-connected storage cells and balance charging method for series-connected storage cells | — | 2016-07-05 |
| 8493034 | Charge control circuit and battery charger including a charge control circuit | — | 2013-07-23 |
| 8410763 | Controller for buck and boost converter | — | 2013-04-02 |
| 8289001 | Battery charging circuit and battery charger | — | 2012-10-16 |
| 8283898 | Battery charging circuit | — | 2012-10-09 |
| 8091257 | Steam iron with acceleration and tilt detection | — | 2012-01-10 |
| 7872460 | Method for detecting output short circuit in switching regulator | Kanji Egawa | 2011-01-18 |
| 7834601 | Circuit and method for reducing output noise of regulator | Kanji Egawa, Shintaroh Murakami | 2010-11-16 |
| 7795848 | Method and circuit for generating output voltages from input voltage | Satoshi Takahashi | 2010-09-14 |
| 7508177 | Method and circuit for reducing regulator output noise | Satoshi Takahashi | 2009-03-24 |
| 6788234 | Method of selecting cells for input code in a digital-to-analog converter | Satoshi Takahashi, Yuichi Nakatani | 2004-09-07 |
| 6686859 | Digital-to-analog-converter | Satoshi Takahashi, Yuichi Nakatani | 2004-02-03 |
| 6346901 | Digital-to-analog conversion circuit | Yuichi Nakatani, Takashi Kumazaki | 2002-02-12 |
| 5977892 | Offset cancellation circuit | Yuichi Nakatani, Satoshi Takahashi | 1999-11-02 |
| 5757303 | Multi-bit A/D converter having reduced circuitry | Yuichi Nakatani, Satoshi Takahashi | 1998-05-26 |
| 5561473 | Contour correction signal generating circuit | Osamu Saionji | 1996-10-01 |
| 5523797 | Luminance signal and color signal separating circuit | Osamu Saionji | 1996-06-04 |