Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11047909 | Inter-domain power element testing using scan | Shakil Ahmad | 2021-06-29 |
| 10120026 | On-chip test pattern generation | Shakil Ahmad | 2018-11-06 |
| 10032723 | Metal layer independent version identifier | Karthik Tammanur Ranganathan, Jau Soon Chee | 2018-07-24 |
| 8832510 | Circuit to reduce peak power during transition fault testing of integrated circuit | Deepak Agrawal | 2014-09-09 |
| 8689068 | Low leakage current operation of integrated circuit using scan chain | Siddhartha Jain, Himanshu Goel | 2014-04-01 |
| 8504886 | Method for partitioning scan chain | Deepak Agrawal | 2013-08-06 |