Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11315655 | Low power memory state retention regulator | Nidhi Chaudhry, Miten H. Nagda | 2022-04-26 |
| 11004843 | Switch control circuit for a power switch with electrostatic discharge (ESD) protection | Michael A. Stockinger | 2021-05-11 |
| 10509428 | Circuit with multiple voltage scaling power switches | Miten H. Nagda, Nidhi Chaudhry, James R. Feddeler, Stefano Pietri, Simon J. Gallimore | 2019-12-17 |
| 10444778 | Voltage regulator | Andre Luis Vilas Boas, Miten H. Nagda, Richard Titov Lara Saez | 2019-10-15 |
| 10122270 | Tunable voltage regulator circuit | Miten H. Nagda, Andre Luis Vilas Boas, Richard Titov Lara Saez | 2018-11-06 |
| 9909934 | Systems and methods for calibrating a temperature detection module | Jose A. Camarena, Khoi Mai | 2018-03-06 |
| 9703303 | Charge pump LDO with secondary sensing for low power need based refresh | Miten H. Nagda, Jose A. Camarena | 2017-07-11 |
| 9569641 | Data processing system with temperature monitoring for security | Mohit Arora, Prashant Bhargava, Simon J. Gallimore, Charles E. Seaberg | 2017-02-14 |
| 9306543 | Temperature-compensated high accuracy clock | Michael T. Berens | 2016-04-05 |
| 9214928 | Clock doubling circuit and method of operation | Michael T. Berens | 2015-12-15 |
| 8981857 | Temperature dependent timer circuit | Michael T. Berens, Miten H. Nagda | 2015-03-17 |
| 8841892 | Method and integrated circuit that provides tracking between multiple regulated voltages | Miten H. Nagda | 2014-09-23 |
| 8638135 | Integrated circuit having latch-up recovery circuit | Jose A. Camarena, Miten H. Nagda | 2014-01-28 |
| 8624653 | Circuit and method for determining comparator offsets of electronic devices | Miten H. Nagda | 2014-01-07 |
| 8456784 | Overvoltage protection circuit for an integrated circuit | Michael A. Stockinger, Chris C. Dao | 2013-06-04 |
| 8278960 | Method and circuit for measuring quiescent current | Michael T. Berens, James R. Feddeler | 2012-10-02 |
| 7274203 | Design-for-test circuit for low pin count devices | Kenneth P. Tumin, George E. Baker, Matthew G. Stout | 2007-09-25 |
| 7245519 | Digitally programmable capacitor array | Michael T. Berens | 2007-07-17 |
| 7236014 | Circuit and method for peak detection of an analog signal | Michael A. Bourland | 2007-06-26 |
| 5798295 | Method for forming a buried contact on a semiconductor substrate | Andrew Paul Hoover, Gregory A. Miller, Winford Lee Hill, II | 1998-08-25 |