VC

Vasily Cheperanov

FG Forschungszentrum Jülich Gmbh: 1 patents #318 of 945Top 35%
📍 Beulich, DE: #2 of 9 inventorsTop 25%
Overall (All Time): #2,505,353 of 4,157,543Top 65%
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Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
12007408 Method for electrically examining electronic components of an integrated circuit Bert Voigtlaender 2024-06-11