Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12348236 | Method for changing a bitwidth of an FPGA configuration | Heiko Kalte | 2025-07-01 |
| 12341512 | Method for programming an FPGA | Heiko Kalte | 2025-06-24 |
| 12265771 | Method for dividing simulation models up between a processor and an FPGA | Andreas Agne | 2025-04-01 |
| 12253876 | Method for programming an FPGA | Heiko Kalte | 2025-03-18 |
| 12197336 | Method for effectively increasing a memory on an FPGA | Heiko Kalte | 2025-01-14 |
| 12158849 | Method for data communication between subregions of an FPGA | Heiko Kalte | 2024-12-03 |
| 12124290 | Time-synchronized input and/or output of signals with a selectable sampling rate | Marc Schlenger, Paul Gruber | 2024-10-22 |
| 12079601 | Computer-implemented method for creating a hierarchical block diagram | Heiko Kalte | 2024-09-03 |
| 11843514 | Computer-implemented method for restructuring a predefined distributed real-time simulation network | Heiko Kalte | 2023-12-12 |
| 11586793 | Method for producing an association list | Heiko Kalte | 2023-02-21 |
| 11442884 | Method for programming a programmable gate array in a distributed computer system | Andreas Agne, Heiko Kalte, Marc Schlenger | 2022-09-13 |
| 11222159 | Method, computer-based system and computer program product for planning partitions for a programmable gate array | Heiko Kalte | 2022-01-11 |
| 11187748 | Procedure for reviewing an FPGA-program | Heiko Kalte | 2021-11-30 |
| 11017141 | Method for troubleshooting the program logic of a system of distributed progammable gate arrays | Heiko Kalte, Marc Schlenger | 2021-05-25 |
| 10706196 | Incremental generation of an FPGA implementation with a graph-based similarity search | Heiko Kalte | 2020-07-07 |
| 10394989 | Method for creating an FPGA netlist | Heiko Kalte | 2019-08-27 |
| 10224930 | Method for detecting the topology of electrical wiring | Marc Schlenger, Heiko Kalte | 2019-03-05 |
| 10102325 | Method for determining the power consumption of a programmable logic device | Marc Schlenger, Heiko Kalte | 2018-10-16 |
| 9870440 | Method for automatically generating a netlist of an FPGA program | Heiko Kalte | 2018-01-16 |
| 9628085 | Method and device for accelerated access to signals of a programmable logic device | Heiko Kalte, Lukas Funke | 2017-04-18 |