Issued Patents All Time
Showing 26–50 of 69 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8429492 | Error correcting code predication system and method | Tony Yoon | 2013-04-23 |
| 8423789 | Key generation techniques | Tze Lei Poo, Gregory Burd, Phuc Thanh Tran | 2013-04-16 |
| 8386735 | Memory architecture and system, and interface protocol | Po-Chien Chang | 2013-02-26 |
| 8373422 | Integrated systems testing | Son Hong Ho | 2013-02-12 |
| 8356223 | Apparatus and method for testing and debugging an integrated circuit | Son Hong Ho, Daniel Smathers | 2013-01-15 |
| 8281191 | Fully-buffered dual in-line memory module with fault correction | Sehat Sutardja | 2012-10-02 |
| 8161336 | Apparatus and method for testing and debugging an integrated circuit | Son Hong Ho, Daniel Smathers | 2012-04-17 |
| 8127067 | High latency interface between hardware components | — | 2012-02-28 |
| 8103921 | Fully-buffered dual in-line memory module with fault correction | Sehat Sutardja | 2012-01-24 |
| 8074135 | Apparatus and method for testing and debugging an integrated circuit | Son Hong Ho | 2011-12-06 |
| 8015224 | Entropy source for random number generation | Panu Chaichanavong, Tze Lei Poo, Zining Wu, Gregory Burd | 2011-09-06 |
| 7962809 | Method and apparatus for improving memory operation and yield | Sehat Sutardja | 2011-06-14 |
| 7930604 | Apparatus and method for testing and debugging an integrated circuit | Son Hong Ho, Daniel Smathers | 2011-04-19 |
| 7873766 | Integrated systems testing | Son Hong Ho | 2011-01-18 |
| 7870331 | Fully-buffered dual in-line memory module with fault correction | Sehat Sutardja | 2011-01-11 |
| 7823030 | Fully-buffered dual in-line memory module with fault correction | Sehat Sutardja | 2010-10-26 |
| 7818639 | Fully-buffered dual in-line memory module with fault correction | Sehat Sutardja | 2010-10-19 |
| 7818636 | Method and apparatus for improving memory operation and yield | Sehat Sutardja | 2010-10-19 |
| 7814382 | Fully-buffered dual in-line memory module with fault correction | Sehat Sutardja | 2010-10-12 |
| 7808262 | Integrated systems testing | Son Hong Ho | 2010-10-05 |
| 7809998 | Method and apparatus for improving memory operation and yield | Sehat Sutardja | 2010-10-05 |
| 7783815 | High latency interface between hardware components | — | 2010-08-24 |
| 7721167 | Apparatus and method for testing and debugging an integrated circuit | Son Hong Ho, Daniel Smathers | 2010-05-18 |
| 7707450 | Time shared memory access | Abdul Elaydi, Yun Yang | 2010-04-27 |
| 7590911 | Apparatus and method for testing and debugging an integrated circuit | Son Hong Ho, Daniel Smathers | 2009-09-15 |