Issued Patents All Time
Showing 26–50 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5473271 | Microprocessor output driver | Stephen N. Grider, Joseph W. Triece | 1995-12-05 |
| 5381540 | Interface: interrupt masking with logical sum and product options | Matthew K. Adams, Stephen N. Grider | 1995-01-10 |
| 5327564 | Timed access system for protecting data in a central processing unit | — | 1994-07-05 |
| 5303390 | Microprocessor auxiliary with combined pin for reset output and pushbutton input | — | 1994-04-12 |
| 5249298 | Battery-initiated touch-sensitive power-up | Michael L. Bolan | 1993-09-28 |
| 5237699 | Nonvolatile microprocessor with predetermined state on power-down | Stephen N. Grider | 1993-08-17 |
| 5218707 | Integrated circuit with remappable interrupt pins | Francis A. Scherpenberg, Clark A. Williams, William J. Podkowa | 1993-06-08 |
| 5212774 | Two processor communications system with processor controlled modem | Stephen N. Grider, Don Folkes, Stephen M. Curry | 1993-05-18 |
| 5203000 | Power-up reset conditioned on direction of voltage change | Don Folkes | 1993-04-13 |
| 5189598 | Dual function microboard with a row of connectors on two edges | Michael L. Bolan, Elaine Jansen, Don Folkes | 1993-02-23 |
| 5182810 | Isolation gates to permit selective power-downs within a closely-coupled multi-chip system | James E. Bartling, Kevin Deierling | 1993-01-26 |
| 5175845 | Integrated circuit with watchdog timer and sleep control logic which places IC and watchdog timer into sleep mode | — | 1992-12-29 |
| 4952817 | Self-starting test station | Michael L. Bolan, Kevin Deierling | 1990-08-28 |
| 4947477 | Partitionable embedded program and data memory for a central processing unit | — | 1990-08-07 |
| 4908790 | Backup battery switching circuitry for a microcomputer or a microprocessor | Stephen N. Grider | 1990-03-13 |
| 4893271 | Synthesized clock microcomputer with power saving | Walter L. Davis, Barry W. Herold | 1990-01-09 |
| 4890263 | RAM with capability for rapid clearing of data from memory by simultaneously selecting all row lines | — | 1989-12-26 |
| 4885716 | High speed carry chain | — | 1989-12-05 |
| 4857767 | High-density low-power circuit for sustaining a precharge level | Michael D. Smith | 1989-08-15 |
| 4771249 | Phase locked loop having a filter with controlled variable bandwidth | Kenneth R. Burch | 1988-09-13 |
| 4769642 | Paging receiver with LPC speech synthesizer | Walter L. Davis | 1988-09-06 |
| 4749991 | Turn off protection circuit | Walter L. Davis, Barry W. Herold | 1988-06-07 |
| 4669059 | Method and apparatus in a data processor for selectively disabling a power-down instruction | Kenneth R. Burch | 1987-05-26 |
| 4618946 | Dual page memory system having storage elements which are selectively swapped between the pages | Tim A. Williams | 1986-10-21 |
| 4506167 | High speed logic flip-flop latching arrangements including input and feedback pairs of transmission gates | Barry W. Herold | 1985-03-19 |