SK

Samant Kumar

CO Contec: 19 patents #2 of 55Top 4%
TI Texas Instruments: 1 patents #7,357 of 12,488Top 60%
Overall (All Time): #218,868 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12155552 Hardware architecture for universal testing system: cable modem test Shivashankar Diddimani, Hemanth Nekkileru, James Christopher Collip, Naresh Chandra Nigam, Mrinal Mathur 2024-11-26
11353507 Core testing machine Dinesh Kumar, Shivashankar Diddimani, Gunjan Samaiya 2022-06-07
10965578 Hardware architecture for universal testing system: cable modem test Shivashankar Diddimani, Hemanth Nekkileru, James Christopher Collip, Naresh Chandra Nigam, Mrinal Mathur 2021-03-30
10578670 Core testing machine Dinesh Kumar, Shivashankar Diddimani, Gunjan Samaiya 2020-03-03
10581718 Wireless devices under test Dinesh Kumar, Shivashankar Diddimani, Gunjan Samaiya, Ina Huh, Jin Sook Ryu 2020-03-03
10581719 Hardware architecture for universal testing system: wireless router test Shivashankar Diddimani, Hemanth Nekkileru, James Christopher Collip, Naresh Chandra Nigam, Mrinal Mathur 2020-03-03
10320651 Hardware architecture for universal testing system: wireless router test Shivashankar Diddimani, Hemanth Nekkileru, James Christopher Collip, Naresh Chandra Nigam, Mrinal Mathur 2019-06-11
10298483 Universal device testing interface Dinesh Kumar, Shivashankar Diddimani, Gunjan Samaiya 2019-05-21
10291959 Set top boxes under test Dinesh Kumar, Shivashankar Diddimani, Gunjan Samaiya 2019-05-14
10230617 Wireless routers under test Dinesh Kumar, Shivashankar Diddimani, Gunjan Samaiya, Ina Huh, Jin Sook Ryu 2019-03-12
10122611 Universal device testing interface Dinesh Kumar, Shivashankar Diddimani, Gunjan Samaiya 2018-11-06
10116397 Test sequences using universal testing system Dinesh Kumar, Ina Huh, Jin Sook Ryu, Rajeev Tiwari 2018-10-30
9992084 Cable modems/eMTAs under test Dinesh Kumar, Shivashankar Diddimani, Gunjan Samaiya, Ina Huh, Jin Sook Ryu 2018-06-05
9960989 Universal device testing system Dinesh Kumar, Shivashankar Diddimani, Gunjan Samaiya 2018-05-01
9900113 Universal tester hardware Shivashankar Diddimani, Hemanth Nekkileru, James Christopher Collip, Naresh Chandra Nigam, Mrinal Mathur 2018-02-20
9900116 Test sequences using universal testing system Dinesh Kumar, Ina Huh, Jin Sook Ryu, Rajeev Tiwari 2018-02-20
9838295 Wireless routers under test Dinesh Kumar, Shivashankar Diddimani, Gunjan Samaiya, Ina Huh, Jin Sook Ryu 2017-12-05
9810735 Core testing machine Dinesh Kumar, Shivashankar Diddimani, Gunjan Samaiya 2017-11-07
9491454 Set top boxes under test Dinesh Kumar, Shivashankar Diddimani, Gunjan Samaiya 2016-11-08
7681012 Method, system and device for handling a memory management fault in a multiple processor device Atul Verma 2010-03-16