SB

Stephan Borel

CEA: 14 patents #210 of 7,956Top 3%
AL Aledia: 1 patents #50 of 84Top 60%
SS Stmicroelectronics (Crolles 2) Sas: 1 patents #308 of 529Top 60%
📍 Crolles, FR: #13 of 148 inventorsTop 9%
Overall (All Time): #337,303 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDate
11978708 Chip or system-in-package protection using the GMI effect Thibaut SOHIER, Jean-Philippe Michel, Gilles Simon 2024-05-07
11894315 Electronic system in package comprising protected side faces Thibaut SOHIER 2024-02-06
11557550 Electronic chip, the rear face of which is protected by an improved embrittlement structure Lucas Duperrex 2023-01-17
11355456 Electronic chip with protected rear face Lucas Duperrex 2022-06-07
10593588 Electronic circuit comprising electrically insulating trenches Fabienne Goutaudier, Thomas Lacave, Vincent Beix, Bertrand Chambion, Brigitte Soulier 2020-03-17
9999138 Making interconnections by curving conducting elements under a microelectronic device such as a chip 2018-06-12
9741670 Electronic chip comprising multiple layers for protecting a rear face Jean Charbonnier 2017-08-22
8685777 Method for fabricating a fixed structure defining a volume receiving a movable element in particular of a MEMS Christel Dieppedale, Bruno Reig, Henri Sibuet 2014-04-01
8541313 Method for etching a sacrificial layer for a micro-machined structure Jeremy Bilde 2013-09-24
8367487 Structure and method for fabricating a microelectronic device provided with one or more quantum wires able to form one or more transistor channels Thomas Ernst 2013-02-05
7910917 Structure and method for realizing a microelectronic device provided with a number of quantum wires capable of forming one or more transistor channels Thomas Ernst 2011-03-22
7902575 Field-effect microelectronic device, capable of forming one or several transistor channels Thomas Ernst 2011-03-08
7518195 Field-effect microelectronic device, capable of forming one or several transistor channels Thomas Ernst 2009-04-14
7436005 Process for fabricating a heterostructure-channel insulated-gate field-effect transistor, and the corresponding transistor Stephane Monfray, Thomas Skotnicki 2008-10-14