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Matthew Pryor — 9 Patents

CTChronos Tech: 9 patents #3 of 5Top 60%
San Diego, CA: #4,726 of 23,606 inventorsTop 25%
California: #67,547 of 386,348 inventorsTop 20%
Overall (All Time): #535,341 of 4,157,543Top 15%
9 Patents All Time
Matthew Pryor has been granted 9 US patents while listed as an inventor at Chronos Tech. The first was granted in 2019 and the most recent in January 2023. Matthew Pryor ranks #535,341 of 4,157,543 US inventors in our database (top 12.9%). Patent records list Matthew Pryor in San Diego, CA, US.

Patents per Year

Patents granted per year, 2019 to 2023Bar chart with a peak of 3 patents in 2019.peak 32019: 3 patents20192020: 2 patents20202021: 1 patents20212022: 2 patents20222023: 1 patents2023

Issued Patents All Time

Showing 1–9 of 9 patents

Patent #TitleCo-InventorsDate
11550982 Application specific integrated circuit interconnect Stefano Giaconi, Giacomo Rinaldi, Matheus Trevisan Moreira, David Fong 2023-01-10
11438132 Systems and methods for the design and implementation of input and output ports for circuit design Stefano Giaconi, Giacomo Rinaldi, Matheus Trevisan Moreira, David Fong 2022-09-06
11418269 System and methods for measuring performance of an application specific integrated circuit interconnect Stefano Giaconi, Giacomo Rinaldi, Matheus Trevisan Moreira, David Fong 2022-08-16
11087057 System and method for application specific integrated circuit design related application information including a double nature arc abstraction Stefano Giaconi, Giacomo Rinaldi, Matheus Trevisan Moreira, David Fong 2021-08-10
10708034 Systems and methods for the design and implementation of input and output ports for circuit design Stefano Giaconi, Giacomo Rinaldi, Matheus Trevisan Moreira, David Fong 2020-07-07
10637592 System and methods for measuring performance of an application specific integrated circuit interconnect Stefano Giaconi, Giacomo Rinaldi, Matheus Trevisan Moreira, David Fong 2020-04-28
10404444 Systems and methods for the design and implementation of input and output ports for circuit design Stefano Giaconi, Giacomo Rinaldi, Matheus Trevisan Moreira, David Fong 2019-09-03
10331835 ASIC design methodology for converting RTL HDL to a light netlist Stefano Giaconi, Giacomo Rinaldi, Matheus Trevisan Moreira, David Fong 2019-06-25
10181939 Systems and methods for the design and implementation of an input and output ports for circuit design Stefano Giaconi, Giacomo Rinaldi, Matheus Trevisan Moreira, David Fong 2019-01-15

Frequent Collaborators

Giacomo Rinaldi9 shared
Stefano Giaconi9 shared
David Fong9 shared
Matheus Trevisan Moreira9 shared

Nearby-Ranked Inventors

Scott Luro9
Kunpeng Zhu9
LuLu Chen9
Chun-Ta Liu9
Shoham Levy9
Min Wook Lee9
Aaron D. Kovar9
Pradeepkumar Ashok9
Ok Chae Kim9