Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6138217 | Method and apparatus for cache coherency in an interconnecting network | — | 2000-10-24 |
| 6078337 | Maintaining consistency of cache memory data by arbitrating use of a connection route by plural nodes | Toshiyuki Fukui, Atsushi Date, Masato Kosugi | 2000-06-20 |
| 6021472 | Information processing device and control method thereof | Toshiyuki Fukui, Shuichi Nakamura | 2000-02-01 |
| 6009490 | System having plurality of nodes with respective memories and an arbiter for performing arbitration of connection line use for transfer of data between nodes | Toshiyuki Fukui, Atsushi Date, Masato Kosugi | 1999-12-28 |
| 5995751 | Information processing apparatus | Masato Kosugi, Atsushi Date, Toshiyuki Fukui | 1999-11-30 |
| 5933261 | Information processing method and system | Toshiyuki Fukui, Tomohiko Shimoyama, Shuichi Nakamura | 1999-08-03 |
| 5923339 | Higher-speed parallel processing | Atsushi Date, Masato Kosugi, Toshiyuki Fukui | 1999-07-13 |
| 5860110 | Conference maintenance method for cache memories in multi-processor system triggered by a predetermined synchronization point and a predetermined condition | Toshiyuki Fukui, Shuichi Nakamura | 1999-01-12 |
| 5802295 | Information processing method and system therefor | Toshiyuki Fukui, Masato Kosugi, Tomohiko Shimoyama | 1998-09-01 |
| 5737568 | Method and apparatus to control cache memory in multiprocessor system utilizing a shared memory | Shigeki Shibayama | 1998-04-07 |
| 5604748 | Information processing apparatus for transmitting information among a plurality of nodes and arbitration method in such information processing apparatus | Atsushi Date, Masato Kosugi, Toshiyuki Fukui | 1997-02-18 |
| 5602663 | Information processing apparatus for multiplex transmission of signal for arbitration and signal for data transfer | Atsushi Date, Masato Kosugi, Toshiyuki Fukui | 1997-02-11 |
| 5577218 | Memory access control method wherein block access is performed as a sequential access to an address updated by incrementation | — | 1996-11-19 |
| 5561542 | Optical communication system and method for performing communication under clock control | Masato Kosugi, Atsushi Date, Toshiyuki Fukui | 1996-10-01 |
| 5386546 | Block substitution method in a cache memory of a multiprocessor system | — | 1995-01-31 |
| 5381466 | Network systems | Shigeki Shibayama | 1995-01-10 |
| 5327538 | Method of utilizing common buses in a multiprocessor system | Shigeki Shibayama | 1994-07-05 |