Issued Patents All Time
Showing 26–40 of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7342414 | Fast router and hardware-assisted fast routing method | Randy Renfu Huang, John C. Wawrzynek | 2008-03-11 |
| 7310004 | Apparatus and method of interconnecting nanoscale programmable logic array clusters | — | 2007-12-18 |
| 7285487 | Method and apparatus for network with multilayer metalization | Raphael Rubin | 2007-10-23 |
| 7274208 | Nanoscale wire-based sublithographic programmable logic arrays | Michael J. Wilson, Charles M. Lieber | 2007-09-25 |
| 7242601 | Deterministic addressing of nanoscale devices assembled at sublithographic pitches | Helia Naeimi | 2007-07-10 |
| 7210112 | Element placement method and apparatus | Michael Wrighton | 2007-04-24 |
| 7073157 | Array-based architecture for molecular electronics | Charles M. Lieber | 2006-07-04 |
| 6963077 | Sublithographic nanoscale memory architecture | Charles M. Lieber, Patrick D. Lincoln, John E. Savage | 2005-11-08 |
| 6900479 | Stochastic assembly of sublithographic nanoscale interfaces | Charles M. Lieber, Patrick D. Lincoln, John E. Savage | 2005-05-31 |
| 6684318 | Intermediate-grain reconfigurable processing device | Ethan Mirsky, Thomas F. Knight, Jr. | 2004-01-27 |
| 6496918 | Intermediate-grain reconfigurable processing device | Ethan Mirsky, Thomas F. Knight, Jr. | 2002-12-17 |
| 6266760 | Intermediate-grain reconfigurable processing device | Ethan Mirsky, Thomas F. Knight, Jr. | 2001-07-24 |
| 6052773 | DPGA-coupled microprocessors | Michael Bolotski, Thomas F. Knight, Jr. | 2000-04-18 |
| 5956518 | Intermediate-grain reconfigurable processing device | Ethan Mirsky, Thomas F. Knight, Jr. | 1999-09-21 |
| 5742180 | Dynamically programmable gate array with multiple contexts | Thomas F. Knight, Jr., Edward Tau, Michael Bolotski, Ian Eslick, Derrick Chen +1 more | 1998-04-21 |