Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8209161 | Method, system, and computer program product for lithography simulation in electronic design automation | — | 2012-06-26 |
| 7996193 | Method for reducing model order exploiting sparsity in electronic design automation and analysis | Zuochang Ye, Joel R. Phillips | 2011-08-09 |
| 7853910 | Parasitic effects analysis of circuit structures | Joel R. Phillips, Zuo-Chang Ye | 2010-12-14 |