YR

Yevgen Ryazanov

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
📍 San Jose, CA: #17,604 of 32,062 inventorsTop 55%
🗺 California: #185,134 of 386,348 inventorsTop 50%
Overall (All Time): #1,920,289 of 4,157,543Top 50%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10802852 Method for interactive embedded software debugging through the control of simulation tracing components Andrew Wilmot, Neeti Khullar Bhatnagar, Qizhang Chao, George F. Frazier 2020-10-13
9400858 Virtual verification machine for a hardware based verification platform Tsair-Chin Lin, Jingbo Gao 2016-07-26