VR

Vasant Ramabadran

CS Cadence Design Systems: 6 patents #235 of 2,263Top 15%
📍 San Jose, CA: #9,474 of 32,062 inventorsTop 30%
🗺 California: #93,399 of 386,348 inventorsTop 25%
Overall (All Time): #835,536 of 4,157,543Top 25%
6
Patents All Time

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDate
10489534 Support for multiple user defined assertion checkers in a multi-FPGA prototyping system 2019-11-26
10282501 Support for multiple user defined assertion checkers in a multi-FPGA prototyping system 2019-05-07
10133836 Systems and methods for on-the-fly temperature and leakage power estimation in electronic circuit designs Ophir Turbovich 2018-11-20
9495492 Implementing synchronous triggers for waveform capture in an FPGA prototyping system Akash Sharma 2016-11-15
9405877 System and method of fast phase aligned local generation of clocks on multiple FPGA system Chun-Kuen Ho 2016-08-02
9294094 Method and apparatus for fast low skew phase generation for multiplexing signals on a multi-FPGA prototyping system 2016-03-22